CryptoURANUS Economics


Saturday, August 31, 2019

Reference-Post: Xilinx ISE-Source-File-Types

Xilinx Source-File-Types ISE

Source File Types

To use and manage source files in Project Navigator, you must add the source files to the project. You can either create new source files in Project Navigator and automatically add them to the project, or you can add existing source files to the project. Following is a list of the supported source types. Some source types may not be available, depending on your design properties (top-level module type, target device, and synthesis tool). 

Note For a list of all the file types generated by the ISE® software, see the "Xilinx® Development System Files" appendix in the Command Line Tools User Guide.

File Type
New Source Wizard Behavior/Tool Launched
Block RAM Memory Map (BMM File)

Used in PowerPC® and MicroBlaze™ processor designs to describe the organization of Block RAM memory.
Note Only one BMM Module is allowed per project.
Opens the file in the text editor you specify in the Editors page of the Preferences dialog box. The CPU executable code is automatically inserted in the configuration file during design implementation.
ChipScope Definition and Connection (CDC File)
Contains generic information about the trigger and data ports of the ChipScope™ core.

Adds the file to the project. Double-click the CDC file in the Hierarchy pane of the Design panel to run the implementation process and launch the ChipScope Pro Core Inserter. For details, see the ChipScope Pro Tool Debugging Overview.
Note  The ChipScope Pro tool must be installed for this source type to be available.
Electronic Data Interchange Format (EDIF)
.edn, .edf, .edif, .sedif
Specifies the design netlist in an industry standard file format.

Must be generated by a third-party design entry tool and added to the project.
Note  You can only add an EDIF file as a top-level module, not as a lower-level module. If you are using hierarchical EDIF files, lower-level EDIF files are automatically processed during the implementation process.

Contains an executable CPU code image.
Note  Only one ELF file is allowed per project.

Must be generated by the Data2MEM command line tool and added to the project.
Embedded Processor
Embedded microprocessor project file created with Xilinx Platform Studio.
Launches the Xilinx Platform Studio in which you can define the embedded processor system portion of your design. For details, see the Embedded Development Kit Documentation.
Implementation Constraints File
also known as User Constraints File (UCF)
Contains user-specified logical constraints.

Adds the file to the project. Double-click the UCF file in the Hierarchy pane of the Design panel, or double-click a Constraints Entry process in the Processes pane to open the file.
You can assign multiple UCFs to the top-level module. For details, see Constraints Entry Methods.
IP (Architecture Wizard)
Contains predefined logic functions that configure architecture features or modules.
Launches one of the Xilinx Architecture Wizards in which you can define your IP. For details, see Working with Architecture Wizard IP.
IP (CORE Generator)
Contains predefined logic functions.
Launches one of the Xilinx IP core customization tools in which you can define your IP. For details, see Working with CORE Generator™ IP.
Memory Definition (MEM File)

Used to define the contents of memory (RAMB4 and RAMB16).
Note Only one MEM file is allowed per project.
Opens the file in the text editor you specify in the Editors page of the Preferences dialog box. The CPU executable code is automatically inserted in the configuration file during design implementation.
Contains a schematic design.
Opens the schematic file in the Project Navigator Workspace. For details, see the Schematic Overview.
System Generator module
Contains Digital Signal Processing (DSP) system module created with System Generator for DSP.

Must be added to the project.
Targeted device, package, and speed grade
Shows the targeted device, package, and speed grade.
Contains an instantiated module that has not been added to the ISE project but is referenced by a source file in the ISE project.
User Document
Multiple file types
Contains user information that is not implemented with the project, for example, supporting documentation.

Must be added to the project.
Verilog Module
Contains Verilog design code.
Opens the file in the text editor you specify in the Editors page of the Preferences dialog box.
Verilog Test Fixture
Defines the stimulus to the ports of an HDL file.
Prompts you to associate the file with a Verilog source module and then opens a skeleton test bench file in the text editor you specify in the Editors page of the Preferences dialog box.
VHDL Library
Contains a collection of VHDL packages.
Adds a new directory to the vhdl library directory in the Libraries panel.
VHDL Module
Contains VHDL design code.
Opens the file in the text editor you specify in the Editors page of the Preferences dialog box.
VHDL Package
Contains definitions, macros, sub-routines, supplemental types, subtypes, constants, functions, and other files.
Opens the file in the text editor you specify in the Editors page of the Preferences dialog box.
VHDL Test Bench
Defines the stimulus to the ports of an HDL file.
Prompts you to associate the file with a VHDL source and then opens a skeleton test bench file in the text editor you specify in the Editors page of the Preferences dialog box.

Saturday, August 24, 2019

ZCash (ZEC): Defined in CryptoCurrency

ZCash (ZEC): Defined in CryptoCurrency is a decentralized open-source cryptocurrency that ensures privacy and selective transparency of transactions. 

Zcash coin payments are published on the public blockchain, but the sender, receiver and transfer amount remain confidential. 

The level of anonymity of Zcash is noted by many well-known companies and individuals. For example, WikiLeaks began accepting donations in Cash, Edward Snowden called cryptocurrency the most interesting alternative to Bitcoin, and Europol officially expressed concern about the increasing popularity of cryptocurrency. 

What is Zcash?
Zcash cryptocurrency is based on the protocol of Bitcoin, however, it supports its own blockchain and currency token. Like Bitcoin, Zcash cryptocurrency can be sent around the world and exchanged for other crypto or fiat currencies through online exchanges, personal transfers etc.

The emission capacity of Zcash coin makes out 21 million coins, new blocks with the size of 2 Mb are being created every 2.5 minutes. The block reward makes out 12.5 ZEC and will be reduced twice every 4 years starting from the moment of launch in October 2016.

The main technical peculiarity of Zcash is the use of the zero-knowledge proof, which allows to confirm transactions without disclosing additional information and makes the use of the crypto currency totally anonymous.

In 2014, zerocoin developers from Johns Hopkins University and cryptographic teams from Massachusetts Institute of technology, Israel Institute of Technology and tel Aviv University developed the zerocash Protocol. Together they were able to improve the original design, making it more efficient and more private.
"Thanks to the New zerocash Protocol, unlike Zerocoin, users can make direct payments to each other using a much more efficient cryptographic Protocol that hides not only the origin but also the amount of the payment"
The zcash for the project was officially announced as the Executive Director Zuko Wilcox. January 20, 2016 as the evolution of the Existing zerocoin project (work of Matthew green, Ian Mayer, Christina Harman, Aviel D. Rubin, Johns Hopkins University, Department of computer science).

With the use of the new Protocol appeared independent cryptocurrency Zcash (ZEC), ceased to be a "Supplement" to bitcoin. On October 28, 2016, Zuko Wilcox held the official" cryptographic ceremony " of the Zcash launch.

Zero-knowledge proof
Zero-knowledge proof is a cryptographic principle that allows to check transactions with encrypted data of the sender’s address, receiver’s address and the transferred amount.

Zcash coin uses a specific type of the zero-knowledge proof that is called zk-SNARKs. For that end, in a Zcash transaction a data string (“key tuple”) is generated by the sender, which consists of a spending key, viewing key and billing address.

A sender cannot generate this string unless he possesses spending keys or the values of sending and receiving are not equal. Zk-SNARKs also creates a unique nullifying function, which marks the tokens as spent after the transaction completion.

Usually, a collection of a billing address, viewing and spending keys is encrypted and unavailable for users. In this way, the transaction check with the keeping the confidentiality of its details is carried out. However, Zcash can carry out public transaction too, providing all data of keys in this case.

KomodoCoin: Defined in CryptoCurrency

Defined in CryptoCurrency

Komodo(KMD) is a cryptocurrency project that focuses on providing anonymity through zero knowledge proofs and security through a novel Delayed Proof of Work (dPoW) protocol.

Komodo Platform Vision & Technology, Amsterdam June 2017
Komodo is a new standard for cryptocurrency security and anonymity. Protected by Zcash Zero Knowledger proofs, users can make 100% untraceable transactions.

The SuperNET team has also developed a hand full of individual tools that will stand together with Komodo to form a complete ecosystem with advanced functionalities like decentralized trading and mixing. Based on bitcoin dark and Zcash principles.

A new mining algorithm, dPoW (delayed proof-of-work), uses bitcoin network hash power- Anonymous team, but the main developer is well-kinown in the community and has frequently worked with the Super.NET project.

Komodo holders receive 5% annual percentage rate (APR) revenue. Every KMD holder will receive it, and it is indeed automatic as there are no settings to turn on, no modes to activate or no passwords to unlock. The 5% APR will remain until the max supply of 200M KMD is reached. Only T-address balances will get the APR.

The Komodo Platform was forked from Zcash by the SuperNET team and it is the evolution of the BitcoinDark cryptocurrency.

The KomodoCoin blockchain platform uses Komodo’s open-source cryptocurrency for doing transparent, anonymous, private, and fungible transactions.

They are then made ultra-secure using Bitcoin’s blockchain via a Delayed Proof of Work (dPoW) protocol. Komodo presents its decentralized (ICO) platform (dICO).

This technology guarantees coin developers a transparent coin offering while maintaining investor privacy through Komodo’s built-in privacy features.

For the first time in crypto history it’s possible to issue and distribute native cryptocurrencies without a trusted third party.

So a dICO doesn’t differentiate from other ICOs by decentralization only, it also needs Komodo Platform’s Jumblr technology to guarantee complete privacy for all ICO parties.

Knowing that dICO is on a Komodo Platform don’t require high fees as each asset chain is an independent blockchain secured by dPoW, enabling all dICO transaction fees to be paid with the dICO coin.

Zcoin: Defined in CryptoCurrency

Defined in CryptoCurrency

Zcoin (XZC) is an open-source privacy-focused cryptocurrency token that launched in Sep 2016. To enable privacy, Zcoin uses zero-knowledge proofs via the Zerocoin protocol.

Zerocoin is a cryptocurrency proposed by Johns Hopkins University professor Matthew D. Green and graduate students Ian Miers and Christina Garman as an extension to the Bitcoin protocol that would add cryptographic anonymity to Bitcoin transactions.

With Zcoin’s Zerocoin feature, only the sender and receive would be able to ascertain the exchange of funds in a given transaction, as no transaction histories are linked to the actual coins. Zcoin operates a multi-node model where mining nodes verify blockchain transactions and Znodes store blockchain data.

Privacy-enhancing Technology, Zerocoin Protocol Zero-Knowledge Cryptographic Proofs.

In Bitcoin, all transactions are broadcasted on a public ledger. Research has shown that external information, such as publicly announced addresses, can be used to link identities and organizations to transactions. The default reuse of bitcoin addresses exacerbates this problem. 

Furthermore, the same type of mechanism used to break privacy in social networks, such as the analysis of social network topology, can be used to break privacy in the Bitcoin network.

Bitcoin and preceding alternative cryptocurrencies attempted to solve this problem through the use of transaction mixers or ring signatures.

However, there are a number of drawbacks to these proposed solutions. For one, a malicious or compromised member of a mixer and-or ring signature can break privacy the transaction mixer.

Furthermore, the anonymity set is a key metric to understanding how private a cryptocurrency is.  The anonymity set in formerly proposed solutions is limited by the size of the mixing cycle and-or ring signature.

Each mixing cycle and-or ring signature is limited by the number of transactions per cycle, which is transitively limited by the the block size of the cryptocurrency.

Thus, the anonymity set in previous attempts at privacy tends to only be a few hundred transactions.

With Zcoin, the anonymity set is on a dramatically higher magnitude. Instead of having an anonymity set limited to the few dozen, Zcoin has an anonymity set that encompasses all minted coins in a particular RSA accumulator that can scale to many thousands and unlike other solutions is not subject to transaction graph analysis.

Wednesday, August 21, 2019

Generate Bitstream, Program FPGA Free

Generate Bitstream, Program FPGA Free


Xilinx always Answers Question, but intel forums rarely do: -i.e. is/are/will any Xilinx bitstream file(s) can be generated with Xilinx free license?

With a Xilinx board you will get a Device-Locked license for the Xilinx software tools (typically Vivado) as described by AR#39845.

Ans For: AR#39845

AR# 39845
Licensing - What does a device locked license allow?

Description A device locked license is usually included with purchased kits and boards (for example SP605, VC707. etc...).

What does this type of license allow?

Is it possible to use the full ISIM and ChipScope Pro tool with access to other devices?

Solution A device locked license typically includes the following features.

Increment Web_Package which gives access to PlanAhead and WebPACK software implementation for WebPACK devices.

Increment "Specific Device" which provides additional access to implementation for the locked device.

Increment "Design Edition" (Logic Edition, Embedded Edition, DSP Edition depending on the board) which allows access to other design tools.

The device license allows for synthesis and implementation of a design targeted to that specific device.

Bitstream generation is also allowed as long at the device in question is not considered early access in the software version being used.

A device locked license covers all the packages of a device.

For example:
The SP605 Evaluation Kit includes a full-seat of Xilinx ISE Design Suite: Logic Edition device locked to the Spartan-6 XC6SLX45T device.

It allows you access to ISE, PlanAhead, ISIM and ChipScope Pro tools for XC6SLX45T as well as WebPACK devices.

The Xilinx tools allow you to enter your design using HDL (eg. VHDL or Verilog), generate a bitstream, and download the bitstream to the FPGA via JTAG or to a flash-memory device connected to the FPGA via JTAG.

If you are making your own FPGA board, then Xilinx offers a free WebPack version of the tools that supports many of the Xilinx FPGAs.

For example, the WebPack Vivado tools support the many Xilinx FPGAs.

Here, shown in Table-1 of Xilinx document UG973 as reference.

That is, WebPack Vivado allows you to enter a design using HDL, generate a bitstream, and download the bitstream to the supported FPGAs and flash-memory.

Monday, August 12, 2019

How to learn to code | Computer Programming

How to learn to code | Computer Programming

TechLead / Published on Jun 9, 2018
Ex-Google tech lead Patrick Shyu explains how to learn to code quickly and easily, with this one weird trick! 
It's so simple with this 1-step program! Are you looking to hack into the mainframe, bypassing the system security lock to gain root access into the private kernel? 
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I always get up and take a short break every 30 minutes. 
Note though that even with breaks, it is known that long periods of general inactivity will put your body to sleep and you need to take longer walks/jogs throughout the day to keep up a healthy metabolism. 
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How To Program an FPGA With Xilinx ISE Webpack In Verilog or VHDL

How To Program an FPGA With Xilinx ISE Webpack In Verilog or VHDL

A Basys2 tutorial. Learn to use Xilinx's ISE Webpack and Digilent's Adept to upload code to your Basys 2 FPGA. In this tutorial we will walk you step by step from downloading all the way to programming a Basys2 FPGA. 

Software needed links: Digilent Adept: 

Digilent Basys2 Board Reference Manual: 

 Basys™2 Spartan-3E FPGA Board: 

Learning Resources: Book To Learn Verilog: Verilog HDL 

Book To Learn Logic Design: Fundamentals of Logic Design 

Book To learn Verilog or VHDL and Logic Design at a fast pace, with not a lot of detail: Introduction to Digital Design 

Website Resources: